A CMOS Headphone Amplifier IC with Performance-Aware Low-Quiescent Design
1:30 - 2:30pm
Rm 2408, 2/F (Lift 17, 18), Academic Complex, HKUST

Abstract

This talk presents the design of a low-quiescent CMOS headphone amplifier IC dedicated to the portable applications whilst without significantly compromising the performance metrics.  Through an improved frequency compensation technique in conjunction with the digitally-assisted calibration technique, a low quiescent power of only 0.4mW at ±1V supplies and a small compensation capacitance of 8.5pF for the amplifier’s driving load of 16Ω//300pF are obtained. Implemented in 65-nm CMOS technology, the amplifier occupies an area of 0.15mm2. It can deliver a peak power of 35mW (1.5Vpp swing) to the above load, yielding the best FOM1 (=PL,peak/Pquiescent) and the best FOM2 (=PL,peak/(Pquiescent X(THD+N)%)) with respect to the state-of-art works.

 

Speaker's Biography

Pak Kwong Chan received the B.Sc. (Hons) degree from University of Essex in 1987, the M.Sc. degree from University of Manchester in 1988, and the PhD degree from University of Plymouth, in 1992. In 1993, he joined the Institute of Microelectronics (IME) as a Member Technical Staff. In 1996, He was a Staff Engineer with Motorola. He joined Nanyang Technological University (NTU) in 1997, where he is an Associate Professor in the School of Electrical and Electronic Engineering. He served as the Program Director of the Center for Integrated Circuits and Systems (CICS) from 2003 to 2010. Currently, he serves as the Program Lead of MSc (Electronics). His research interests include circuit design in areas of analog/mixed-signal systems, sensor electronics, power management ICs and PVT-tolerant systems. 

日期
時間
1:30 - 2:30pm
地點
Rm 2408, 2/F (Lift 17, 18), Academic Complex, HKUST
活動形式
講者/ 表演者:
Prof. Pak Kwong Chan
語言
英文
主辦單位
電子及計算機工程學系
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