Modern System Design – Ramifications In Compute, Communication, And Cloud
1:30 - 2:30pm
Rm 2303, 2/F (Lift 17, 18), Academic Complex, HKUST

Abstract

In this talk we will discuss the motivations, the drivers and the problems of modern hardware system design when considering the full stack – Compute, Communication and the Cloud. We will examine the technology outlook, peering into a not-so-distant future, and the 'technology dividends' as well, while also analyzing some of the implications, the scaling challenges and some solution approaches. In the latter part, we will explore the connection of industrial system architecture & design to its validation & debug, and what the various associated disciplines entail.

 

Speaker's Biography

Dr. Priyadarsan (Darshan) Patra served as the chief Architect (System Validation) at Intel’s Data Center Group.  He has had 23 years at Intel creating and leading world-class research and development for Server, SoC and Client processors/devices (e.g. P6, Nehalem, Wesmere, Haswell, Broadwell, Valleyview, Broxton, Skylake, Base station APU, smartNIC) involving Design, Validation, Debug & Test.  His leadership and experience at Strategic CAD Labs, Microprocessor Technology Labs, Intel Architecture Group and Networking Platforms Group spanned these areas:  Architecture for Validation & Debug; HVM Functional-Test; Low-power design and systems; Strategic Co-optimized software, firmware & hardware system validation; high-perf and low-power circuits (CAD); Algorithms and non-linear optimization, Technical management & strategic planning. He led the definition and end-to-end implementations of technologies such as DCI/EXI, VCU, probeless PSMI that appear in multiple generations and families of Intel silicon. He has authored a dozen patents & inventions, 50+ peer-reviewed papers, and 2 books in technical fields.  He has directly mentored technical work of over a dozen graduate students and many professors through the years.

Darshan is an elected Senior Member of both the IEEE and the ACM and has held several leadership positions in the technical community. He has been recognized with several awards including Intel Hero (US) and Intel Trail Blazer Awards. He serves as the Founding Chair of the IEEE-CEDA System Validation and Debug Technology Committee (SVDTC), and as the Steering Committee Chair of the Int’l Symposium on Embedded Computing & System Design. Passionate about social development and volunteerism around the world, he has founded the Sustainable Economic and Educational Development Society. He holds a Ph.D. from the Univ. of Texas at Austin and B.E. from the Indian Institute of Science at Bangalore.

When
Time
1:30 - 2:30pm
Where
Rm 2303, 2/F (Lift 17, 18), Academic Complex, HKUST
Event Format
Speakers / Performers:
Dr. Priyadarsan (Darshan) Patra

Intel Encore Fellow

 

Dr. Priyadarsan (Darshan) Patra served as the chief Architect (System Validation) at Intel’s Data Center Group.  He has had 23 years at Intel creating and leading world-class research and development for Server, SoC and Client processors/devices (e.g. P6, Nehalem, Wesmere, Haswell, Broadwell, Valleyview, Broxton, Skylake, Base station APU, smartNIC) involving Design, Validation, Debug & Test.  His leadership and experience at Strategic CAD Labs, Microprocessor Technology Labs, Intel Architecture Group and Networking Platforms Group spanned these areas:  Architecture for Validation & Debug; HVM Functional-Test; Low-power design and systems; Strategic Co-optimized software, firmware & hardware system validation; high-perf and low-power circuits (CAD); Algorithms and non-linear optimization, Technical management & strategic planning. He led the definition and end-to-end implementations of technologies such as DCI/EXI, VCU, probeless PSMI that appear in multiple generations and families of Intel silicon. He has authored a dozen patents & inventions, 50+ peer-reviewed papers, and 2 books in technical fields.  He has directly mentored technical work of over a dozen graduate students and many professors through the years.

Darshan is an elected Senior Member of both the IEEE and the ACM and has held several leadership positions in the technical community. He has been recognized with several awards including Intel Hero (US) and Intel Trail Blazer Awards. He serves as the Founding Chair of the IEEE-CEDA System Validation and Debug Technology Committee (SVDTC), and as the Steering Committee Chair of the Int’l Symposium on Embedded Computing & System Design. Passionate about social development and volunteerism around the world, he has founded the Sustainable Economic and Educational Development Society. He holds a Ph.D. from the Univ. of Texas at Austin and B.E. from the Indian Institute of Science at Bangalore.

Language
English
Organizer
Department of Electronic & Computer Engineering
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